As semiconductor manufacturing continues the dimensional shrinking process, novel ideas are required to achieve the ability to continue shrinking the dimensions while increasing the performance. There are some thoughts that this potion of the Moore\u2019s law curve will provide some additional benefits.<\/p>\n\n\n\n
As the industry moves into the sub 10 nanometer nodes, physical properties become major role players in what will be able to be manufactured in volume *with sufficient yields) and what won\u2019t work.\u00a0 Intel has released its roadmap [Ref. 1] for the smaller dimensions and is moving away from the nanometer scale.\u00a0 After the 3nm node, it will not be the 2nm node. Instead, it will be the 20 Angstrom node. That will be followed by the 18 Angstrom node. \u00a0[An Angstrom is 10-9<\/sup> meters or a tenth of a nanometer.\u00a0 It is not a new term. Angstroms were used in optics for hundreds of years.].<\/p>\n\n\n\n While the size terminology is interesting, it is the actual physical propertied and the manufacturing of the completed devices that are the objective. <\/p>\n\n\n\n Filed Effect Transistors [FETs], and specifically MOSFETs manage current flow by controlling current flow.\u00a0 The gate electrode and the channel are two plates of a capacitor.\u00a0 Unfortunately, the gate capacitance depends on the material properties at the dimensions required.\u00a0 The loss of the needed parameters as size shrinks is driving the investigation to what are being called two-dimensional semiconductors.\u00a0[Ref. 2] More detail on this topic is available in our April 2021 blog. [Ref. 3]<\/p>\n\n\n\n In the article with Intel\u2019s planned roadmap, there is mention that starting at 20A, Intel is considering changing to a \u201cgate all-around\u201d structure [GAA].\u00a0 The Intel approach is somewhat different from others working on GAA and their modification is being called the ribbonFET.\u00a0 [Ref. 1]<\/p>\n\n\n\n Another topic of current interest is \u201cchiplets\u201d.\u00a0 [Ref. 4] The concept behind this is to create individual segments for a system and be able to place them in positions that are favorable to data transfer and processing.\u00a0 This approach is a means of reducing costs while achieve apparent scaling benefits.\u00a0 On a larger scale there are many companies working on various approached to reduce dimensions by using multiple levels (this is not multiple layers) with interconnections to complete the system interconnections.\u00a0 I know of one sensor system that has multiple levels for a complete autonomous sensor system with capabilities of working in temperatures of over 120C and over 10K PSI.\u00a0 It has sensors and can store data for up to a week before being wirelessly interrogated for data transmission.\u00a0 This device is under 8mm in diameter.\u00a0 It will be shrunk to under 5mm in the near future but taking it to under 1,000 microns would be a challenge without moving to something like the chiplet approach.<\/p>\n\n\n\n While the topic of semiconductors is mainly about shrinking feature sizes and increasing processing capability, the real changes will come from nanomaterial characteristics.\u00a0 The fact that today, researchers are developing a method to layer different 2-dimensional materials together indicates the direction.\u00a0 For this to be successful, the method to develop large scale 2-D material without defects still remains a challenge.\u00a0 It will happen, but will require development efforts.<\/p>\n\n\n\n References:<\/strong><\/p>\n\n\n\n As semiconductor manufacturing continues the dimensional shrinking process, novel ideas are required to achieve the ability to continue shrinking the dimensions while increasing the performance. There are some [..]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[14,9],"tags":[],"class_list":["post-420","post","type-post","status-publish","format-standard","hentry","category-misc-ramblings","category-nano"],"_links":{"self":[{"href":"http:\/\/www.nano-blog.com\/index.php?rest_route=\/wp\/v2\/posts\/420","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/www.nano-blog.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/www.nano-blog.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/www.nano-blog.com\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/www.nano-blog.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=420"}],"version-history":[{"count":1,"href":"http:\/\/www.nano-blog.com\/index.php?rest_route=\/wp\/v2\/posts\/420\/revisions"}],"predecessor-version":[{"id":421,"href":"http:\/\/www.nano-blog.com\/index.php?rest_route=\/wp\/v2\/posts\/420\/revisions\/421"}],"wp:attachment":[{"href":"http:\/\/www.nano-blog.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=420"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/www.nano-blog.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=420"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/www.nano-blog.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=420"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}